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| TECHNICAL DATA ILA1068 Versatile Telephone Transmission Circuit with Dialler Interface The ILA1068 is a bipolar integrated circuit performing all speech and line interface functions required in fully electronic telephone sets. It performs electronic switching between dialling and speech. * Voltage regulator with adjustable static resistance * Provides supply for external circuitry * Symmetrical high-impedance inputs (64 K) for dynamic, 1 magnetic or piezoelectric microphones * Asymmetrical high-impedance input (32 K) for electret ORDERING INFORMATION microphone ILA1068N Plastic DIP * Dual-Tone Multi-Frequency (DTMF) signal input with confidence tone TA = -25 to 75 C * Mute input for pulse or DTMF dialling for package * Power down input for pulse dial or register recall * Receiving amplifier for magnetic, dynamic or piezoelectric earpieces * Large gain setting range on microphone and earpiece amplifiers * Line current-dependent line loss compensation facility for microphone and earpiece amplifiers * Gain control adaptable to exchange supply * DC line voltage adjustment facility BLOCK DIAGRAM 1 ILA1068 PIN DESCRIPTION Pin No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Designation LN GAS1 GAS2 QRQR+ GAR MICMIC+ STAB VEE IR PD DTMF MUTE VCC REG AGC SLPE Description positive line terminal gain adjustment transmitting amplifier gain adjustment transmitting amplifier inverting output receiving amplifier non-inverting output receiving amplifier gain adjustment receiving amplifier inverting microphone input non-inverting microphone input current stabilizer negative line terminal receiving amplifier input power-down input dual-tone multi-frequency input mute input positive supply decoupling voltage regulator decoupling automatic gain control input slope (DC resistance) adjustment PIN ASSIGNMENT LN GAS1 GAS2 QRQR+ GAR MICMIC+ STAB 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 SLPE AGC REG VCC MUTE DTMF PD IR VEE 2 ILA1068 FUNCTIONAL DESCRIPTION maximum output swing on LN and the DC characteristics (especially at lower voltages). Under normal conditions, when ISLPE >> ICC + 0.5 mA + Ip , the static behaviour of the circuit is that of a 4.2 V regulator diode with an internal resistance equal to that of R9. In the audio frequency range, the dynamic impedance is largely determined by R1 (see Fig.2). The internal reference voltage can be adjusted by means of an external resistor (RVA). This resistor, connected between LN and REG, will decrease the internal reference voltage; when connected between REG and SLPE, it will increase the internal reference voltage. Current (Ip) available from VCC for supplying peripheral circuits depends on external components and on the line current. Supplies VCC, LN, SLPE, REG and STAB Power for the IC and its peripheral circuits is usually obtained from the telephone line. The ILA1068 develops its own supply at V and regulates its CC voltage drop. The supply voltage V may also be CC used to supply external circuits, e.g. dialling and control circuits. Decoupling of the supply voltage is performed by a capacitor between VCC and VEE; the internal voltage regulator is decoupled by a capacitor between REG and VEE. The DC current flowing into the set is determined by the exchange voltage (Vexch), the feeding bridge resistance, (Rexch) and the DC resistance of the telephone line (Rline). An internal current stabilizer is set by a resistor of 3.6 K between the current stabilizer pin STAB and VEE (see Fig.1). R line I line ISLPE +0.5 mA R1 ICC LN VCC IC ILA1068 R exch DC AC Vexch REG + C3 STAB I SLPE R5 + 0.5 mA VEE + C1 SLPE R9 peripheral circuit Leq = C3 x R9 x RP RP = 17.5K Figure 2. Equivalent impedance circuit Microphone inputs MIC+ and MIC- and gain pins GAS1 and GAS2 The circuit has symmetrical microphone inputs. Its input impedance is 64 K (2 x 32 K) and its voltage gain is typically 52 dB (when R7 = 68 K, see Figure 5). Dynamic, magnetic, piezo-electric or electret (with built-in FET source followers) can be used. The gain of the microphone amplifier can be adjusted between 44 dB and 60 dB. The gain is proportional to the value of R7 connected between GAS1 and GAS2. An external capacitor C6 of 100 pF between GAS1 and SLPE is required to ensure stability. A larger value may be chosen to obtain a first-order low-pass filter. The cut-off frequency corresponds to the time constant R7 x C6. Figure 1. Supply arrangement If the line current Iline exceeds the current ICC + 0.5 mA required by the circuit itself (approximately 1mA) plus the current Ip required by the peripheral circuits connected to VCC, then the voltage regulator diverts the excess current via LN. The regulated voltage on the line terminal (VLN) can be calculated as: VLN = Vref + ISLPE x R9 VLN = Vref + ((Iline - ICC - 0.5 x 103)-Ip) x R9, where Vref is an internally generated temperature compensated reference voltage of 4.2 V and R9 is an external resistor connected between SLPE and V . EE The preferred value for R9 is 20 . Changing the value of R9 will also affect microphone gain, DTMF gain, gain control characteristics, side-tone level, the 3 ILA1068 Automatic line loss compensation is achieved by connecting a resistor (R6) between AGC and VEE. The automatic gain control varies the gain of the microphone amplifier and the receiving amplifier in accordance with the DC line current. The control range is 5.8 dB which corresponds to a line length of 5 km for a 0.5 mm diameter twisted-pair copper cable with a DC resistance of 176 /km and average attenuation of 1.2 dB/km. Resistor R6 should be chosen in accordance with the exchange supply voltage and its feeding bridge resistance (see Table 1). Different values of R6 give the same ratio of line currents for start and end of the control range. If automatic line loss compensation is not required, AGC may be left open. The amplifiers then all give their maximum gain as specified. Table 1 Values of resistor R6 for optimum line-loss compensation, for various usual values of exchange supply voltage (Vexch) and exchange feeding bridge resistance (Rexch); R9 = 20 . Vexch(V) 24 36 48 60 400 Rexch() 61.9 100 140 600 800 Rexch() Rexch() R6(K) 48.7 78.8 68 110 93.1 120 1000 Rexch() 60.4 82 102 Input MUTE A HIGH level at MUTE enables the DTMF input and inhibits the microphone and the receiving amplifier inputs. A LOW level or an open circuit has the reverse effect. MUTE switching causes only negligible clicks at the earpiece outputs and on the line. Dial-tone multi-frequency input DTMF When the DTMF input is enabled dialling tones may be sent on to the line. The voltage gain from DTMF to LN is typically 2 dB (when R7 = 68 K) and 5.5 varies with R7 in the same way as the microphone amplifier. The signalling tones can be heard in the earpiece at a low level (confidence tone). Receiving amplifier IR, QR-, QR+ and GAR The receiving amplifier has one input (IR) and two complementary outputs, a non-inverting output QR+ and an inverting output QR-. These outputs may be used for single-ended or for differential drive depending on the sensitivity and type of earpiece used. Gain from IR to QR+ is typically 25 dB (when R4 = 100 K). This is sufficient for low-impedance magnetic or dynamic microphones, which are suited for single-ended drive. By using both outputs (differential drive), the gain is increased by 6dB. This feature can be used when the earpiece impedance exceeds 450 , (high-impedance dynamic or piezoelectric types). The output voltage of the receiving amplifier is specified for continuous-wave drive. The maximum output voltage will be higher under speech conditions where the ratio of peak to RMS value is higher. The receiving amplifier gain can be adjusted between 17 dB and 33 dB with single-ended drive and between 26 dB and 39 dB with differential drive to suit the sensitivity of the transducer used. The gain is set by the external resistor R4 connected between GAR and QR+. Overall receive gain between LN and QR+ is calculated by subtracting the anti-side-tone network attenuation (32 dB) from the amplifier gain. Two external capacitors, C4 = 100 pF and C7 = 10 x C4 = 1 nF, are necessary to ensure stability. A larger value of C4 may be chosen to obtain a firstorder, low-pass filter. The `cut-off' frequency corresponds with the time constant R4 x C4. Automatic gain control input AGC Power-Down input (PD) During pulse dialling or register recall (timed loop break), the telephone line is interrupted. During these interruptions, the telephone line provides no power for the transmission circuit or circuits supplied by VCC. The charge held on C1 will bridge these gaps. This bridging is made easier by a HIGH level on the PD input, which reduces the typical supply current from 1mA to 55 mA and switches off the voltage regulator, thus preventing discharge through LN. When PD is HIGH, the capacitor at REG is disconnected with the effect that the voltage stabilizer will have no switch-on delay after line interruptions. This minimizes the contribution of the IC to the current waveform during pulse dialling or register recall. When this facility is not required, PD may be left open-circuit. Side-tone suppression The anti-side-tone network, R1//Zline, R2, R3, R8, R9 and Zbal (see Fig.5) suppress the transmitted signal in the earpiece. Maximum compensation is obtained when the following conditions are fulfilled: 4 ILA1068 The scale factor k, dependent on the value of R8, is chosen to meet the following criteria: * compatibility with a standard capacitor from the E6 or E12 range for Zbal * Zbal // R8< R9 x R2 = R1 x Zbal = Zbal + R8 ( R3 + R8//Z ) line (1) (2) Zline = Z + R1 line It fixed values are chosen for R1, R2, R3 and R9, then condition (1) will always be fulfilled when R8//Zbal< 5 ILA1068 Figure 4. Equivalent circuit of an anti-side-tone network in a Wheatstone bridge configuration. MAXIMUM RATINGS * Symbol Iline Tstg TL * Parameter Line current Storage temperature Lead Temperature, 1.0 mm from Case for 4 Seconds Input 01 Condition Min -40 Max 140 +85 265 Unit mA C C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol Iline A U1 A U2 A U3 Tamb Parameter Operating line current normal operation Voltage gain microphone amplifier Voltage gain multi-frequency Voltage gain receiving amplifier Operating ambient temperature ILA1068A ILA1068B ILA1068A ILA1068B ILA1068A ILA1068B Conditions Min 10 51 45.5 24.5 18.5 24 18 -25 Max 140 53 59 26.5 32.5 26 32 +70 Unit mA dB dB dB C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 6 ILA1068 ELECTRICAL CHARACTERISTICS Guaranteed Limits ILA1068AN Symbol Parameter Test Conditions 25C min VLN1 Voltage Drop Over Circuit between LN and VEE Supply Current Supply Current Feed current for the peripheral circuits Voltage Gain MIC+ or MICto LN Voltage Gain from DTMF to LN Voltage Gain from IR to QR+ or QRVoltage Drop Over Circuit between LN and VEE with External Resistor RVA Input Impedance differential between MICand MIC+ V(12,14) = 0 V, Iline (01) = 5 mA Iline (01) = 15 mA Iline (01) = 100 mA Iline (01) = 140 mA V(15) = 2.8 V, V(12,14) = 0 V V(12,15) = 2.8 V, V(14) = 0 V Iline (01) = 15 mA, V(14,15) = 2.2 V Iline (01) = 15 mA, V(14,15) = 3.0 V Iline (01) = 15 mA, V(12,14) = 0 V Iline (01) = 15 mA, V(12,14) = 0 V Iline (01) = 15 mA, V(12,14) = 0 V Iline (01) = 15 mA, V(12,14) = 0 V, RVA (REG to SLPE)=39 K RVA (LN to REG)=68 K Iline (01) = 15 mA 3.95 4.2 5.4 1.8 0.4 51 max 4.55 4.7 6.7 7.5 1.3 82 5.2 5.2 53 -25C to 70C min 2.96 3.15 4.05 1.35 0.5 38.3 max 5.69 5.87 8.37 9.37 1.62 84 66.2 ILA1068BN 25C min 3.6 3.6 4.5 5.5 0.05 1.8 0.4 45.5 max 5.55 6.3 7.7 9.0 1.3 82 5.2 5.2 59 -25C to 70C Unit min 2.96 3.15 4.05 1.35 0.5 38.3 max 5.69 5.87 8.37 9.37 1.62 84 66.2 V ICC1 ICC2 I mA A mA mA dB A U1 A U2 24.5 26.5 18.4 33.1 18.5 32.5 18.4 33.1 dB A U3 24 26 18 32.5 18 32 18 32.5 dB VLN2 4.65 3.45 51 5.35 4.1 77 3.5 2.6 38 6.7 5.0 96 4.25 3.15 51 5.65 4.4 77 3.5 2.6 38 6.7 5.0 96 V RI1 K 7 ILA1068 RI2 RI3 Input Impedance single-ended MICor MIC+ to VEE Iline (01) = 15 mA 8.0 58 16 78 - - 8.0 58 16 78 - - K (continued) 8 ILA1068 Guaranteed Limits ILA1068AN Symbol Parameter Test Conditions 25C min RI4 Input Impedance (DTMF input) Input Impedance (Receiving Amplifier Input IR) Output Voltage Output Voltage Voltage Gain Input Current Input Current Voltage Gain Reduction Between MIC+ and MIC- to LN Iline (01) = 15 mA 16.8 max 24.6 -25C to 70C min 12.6 max 30.8 ILA1068BN 25C min 16.8 max 24.6 -25C to 70C Unit min 12.6 max 30.8 K RI5 Iline (01) = 15 mA 17 25 12.75 31.25 17 25 12.75 31.25 K VO1 Iline (01) = 15 mA THD = 2% THD = 10% Iline (01) = 15 mA THD = 2% Iline (01) = 15 mA, V(12) = 3.5 V Iline (01) = 15 mA, V(14) = 3.5 V Iline (01) = 15 mA, V(14) = 3.5 V Iline (01) = 15 mA, V(14) = 2.8 V 1.9 2.1 0.8 -17 0 70 -21 10 15 - 1.43 1.58 0.6 - 1.9 2.1 0.8 -21 10 15 - 1.43 1.58 0.6 - V V dB A A dB VO2 KU IPD IMUTE A U -12.75 -26.25 -17 0 70 12.5 18.75 0 - -12.75 -26.25 0 12.5 18.75 - 9 ILA1068 Voltage gain is defined as GV = 20 log VO VI For measuring gain from MIC+ and MIC- the MUTE input should be LOW or open. For measuring the DTMF input, the MUTE input should be HIGH. Inputs not being tested should be open. Figure 5. Test circuit for defining voltage gain of MIC+, MIC- and DTMF inputs. Typical application of the ILA1068, shown here with a piezoelectric earpiece and DTMF dialling. The bridge to the left and R10 limit the current into the circuit and the voltage across the circuit during line transients. Pulse dialling or register recall require a different protection arrangement. Figure 6. Application diagram. 10 ILA1068 CHIP PAD DIAGRAM Chip marking 14152 18 19 2.8 + 0.02 20 17 16 15 14 13 12 11 10 09 08 07 01 02 03 Y 04 05 06 (0,0) X 3.2+ 0.03 Location of marking (mm): left lower corner x=0.180, y=2.555. Chip thickness: 0.46 0.02 mm. Pad No 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 Symbol LN GAS1 GAS2 QRQR+ GAR MICMIC+ STAB VEE IR PD DTMF MUTE VCC REG AGC SLPE Location (left lower corner), mm X 0.268 0.268 0.268 0.804 1.068 1.708 2.807 2.807 2.807 2.807 2.807 2.807 2.807 2.807 1.825 1.584 1.086 0.320 0.268 0.268 Y 1.133 0.784 0.284 0.284 0.284 0.284 0.284 0.554 0.738 1.075 1.293 1.619 1.911 2.350 2.350 2.350 2.350 2.350 1.936 1.686 Pad size, mm 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 0.140 x 0.140 11 |
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